1. Field of the Invention
The present invention relates to a solid-state image sensor, and more specifically to a solid-state image sensor having a floating diffusion type charge detecting amplifier in an output circuit.
2. Description of the Prior Art
FIG. 1 schematically shows one conventional CCD imager of an interline transfer mode. This imager includes a two-dimensional (area) array of photosensors 1 and vertical registers 3. Each of the photosensors 1 constitutes one pixel element and accumulates signal charge corresponding to incident light flux. Each of the vertical shift registers 3 is provided for a unique one of vertical columns of the array. The accumulated charge is transferred instantaneously through a readout gate (or transfer gate) 2 into the associated vertical shift register 3 during a part of the vertical blanking interval, and the signal charge is shifted downwards in the vertical shift register 3. The photosensor array and the vertical shift registers 3 constitute a photosensitive imaging section (or area) 4. In this example, the photosensors 1 are photodiodes, and the vertical shift registers 3 are CCD (Charge Coupled Device) shift registers.
Then, the signal charges are transferred from the vertical shift registers 3 to a horizontal shift register 5 sequentially during a part of the horizontal blanking interval. The horizontal register 5 receives a series of signal charges corresponding to one scanning line at each time. From the horizontal shift register 5, the signal charges are transferred one after another to a floating diffusion (FD) 6 in the horizontal scanning interval of a television signal. The floating diffusion 6 is connected to an amplifier 7 for detecting signal charges. The amplifier 7 of this example is a two-state source-follower amplifier. The source-follower amplifier 7 generates an electric signal (such as a voltage signal) corresponding to the signal charge. The source-follower amplifier 7 has at least one drive side MOS transistor 8 and at least one load side MOS transistor 9.
FIG. 2 shows a cross sectional structure of the conventional source-follower amplifier 7. As shown in FIG. 2, the drive side MOS transistor 8 and the load side MOS transistor 9 are formed through a P well (P type region) 12 in and on a substrate of the CCD image sensor. The substrate of this example is an N type substrate 11. The P well 12 functions to achieve electrical isolation of active regions including the regions of the MOS transistors 8 and 9 from the backside of the substrate 11.
In the conventional source follower amplifier 7, however, the drive side MOS transistor 8 and the load side MOS transistor 9 are both formed in the single well 12 having a uniform structure. Therefore, the I-V characteristics of both transistors 8 and 9 are substantially the same, and it is not possible to optimize the characteristics of both transistors at the same time. The conventional source-follower amplifier 7 is, therefore, fabricated at the expense of the I-V characteristic of the load side MOS transistor 9 so that a short-channel effect (a greater drain conductance) remains. As a result, the gain of the amplifier is considerably limited as explained later.